A novel optimum variation lateral doping SiC lateral double-diffused metal oxide semiconductor with improved performance

In thsi paper a novel optimum variation lateral doping 4H-SiC lateral double-diffused metal oxide semiconductor (LDMOS) field-effect transistor with improved performance is proposed and numerically simulated. For the proposed 4H-SiC LDMOS, an optimized three-stage variation of lateral doping (VLD) p-top layer is employed in the drift region; thus the doping concentration of the n-drift region can be significantly increased, resulting an ultra-low specific resistance (R (on,sp)). The breakdown voltage (BV) is also improved, since the electric field distribution of the drift region is optimized. The current saturation characteristic, gate-drain capacitance (C (GD)) and gate-to-drain charge (Q (gd)) of the proposed device are all improved, thanks to the effect of the source-connected p-top region. Compared with a conventional LDMOS, the numerical simulation results show that the BV, R (on,sp) and Q (gd) of the proposed LDMOS are improved by more than 11.9%, 47.3% and 46.3%, respectively. The three-dimensional simulation result indicates that the entire three-stage p-top VLD layer can be produced by one-time fabrication process, which brings great convenience to future production.