A multi-path switched-capacitor-inductor hybrid DC-DC converter with reduced inductor loss and extended voltage conversion range

被引：3

作者：

Ma, Qiaobo ^{[1
,2
]}

Zhang, Xiongjie ^{[1
,2
]}

Jiang, Yang ^{[1
,2
]}

Hata, Katsuhiro ^{[3
]}

Takamiya, Makoto ^{[3
]}

Law, Man-Kay ^{[1
,2
]}

Mak, Pui-In ^{[1
,2
]}

Martins, Rui P. ^{[1
,2
,4
]}

机构：

[1] Univ Macau, State Key Lab Analog & Mixed Signal VLSI, Inst Microelect, Macau 999078, Peoples R China

[2] Univ Macau, Fac Sci & Technol ECE, Macau 999078, Peoples R China

[3] Univ Tokyo, Inst Ind Sci, Tokyo 1538505, Japan

[4] Univ Lisbon, Inst Super Tecn, P-1049001 Lisbon, Portugal

来源：

IEICE ELECTRONICS EXPRESS | 2021年 / 18卷 / 22期

关键词：

DC-DC converter; DCR loss; hybrid topology; multi-path; switched-capacitor; voltage conversion range; MINIMIZED CROSS-REGULATION; LIGHT-LOAD EFFICIENCY;

D O I：

10.1587/elex.18.20210405

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This work proposes a hybrid DC-DC converter using a multipath switched-capacitor-inductor (MPSCI) topology. Assisted by switched-capacitor branches, it features voltage-conversion range extension and inductor power loss reduction, and hence improving the conversion efficiency. Implemented in a 180-nm CMOS process, the proposed converter can regulate an output voltage of 1.8 similar to 3.3V from a 5-V input bus voltage using a 4.7 mu H inductor (DCR = 240m Omega) at a switching frequency of 800 kHz. It achieves a peak conversion efficiency of 93.7% when delivering an output current of 1 A. Under a maximum loading of 3 A, this design still attains an efficiency of up to 85.8%. Furthermore, in contrast to the existing dual-path and conventional buck topologies, the proposed converter realizes an inductor loss reduction up to 3.3 and 5.4 times, respectively, at the maximum loading conditions.

引用

页数：6

共 30 条

[1]

Ahsanuzzaman SM, 2016, APPL POWER ELECT CO, P2497, DOI 10.1109/APEC.2016.7468216

[2] An Integrated High-Density Power Management Solution for Portable Applications Based on a Multioutput Switched-Capacitor Circuit [J].