Experiences on developing computer vision hardware algorithms using Xilinx system generator

被引：19

作者：

Moreo, AT ^{[1
]}

Lorente, PN ^{[1
]}

Valles, FS ^{[1
]}

Muro, JS ^{[1
]}

Andrés, CF ^{[1
]}

机构：

[1] Univ Politecn Cartagena, Div Sistemas & Ingn Elect, E-30202 Cartagena, Spain

来源：

MICROPROCESSORS AND MICROSYSTEMS | 2005年 / 29卷 / 8-9期

关键词：

computer vision; co-design environments; FPGA-based hardware implementation; MatLab; Xilinx system generator;

D O I：

10.1016/j.micpro.2004.11.002

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Computer vision is one of the areas where hardware-implemented algorithms perform clearly better than those implemented via software. Digital designers have so far optimized their designs by means of application specific integrated circuits (ASICs) or digital signal processors (DSPs). However, nowadays they are increasingly using field programmable gate arrays (FPGAs), powerful hardware devices combining the main advantages of ASICs and DSPs with the possibility of re-programming, which make them very attractive devices for rapid prototyping. This paper shows how the Xilinx system generator (XSG) environment can be used to develop hardware-based computer vision algorithms from a system level approach, which makes it suitable for developing co-design environments. (C) 2004 Elsevier B.V. All rights reserved.

引用

页码：411 / 419

页数：9

共 34 条

[1] From C to netlists: hardware engineering for software engineers? [J].

Alston, I ;

Madahar, B .

ELECTRONICS & COMMUNICATION ENGINEERING JOURNAL, 2002, 14 (04) :165-173

[2] REAL-TIME IMAGE-PROCESSING ON A CUSTOM COMPUTING PLATFORM [J].

ATHANAS, PM ;

ABBOTT, AL .

COMPUTER, 1995, 28 (02) :16-24

[3]

BERND J, 2000, COMPUTER VISION APPL, P5

[4] Reconfigurable computing: A survey of systems and software [J].

Compton, K ;

Hauck, S .

ACM COMPUTING SURVEYS, 2002, 34 (02) :171-210

[5]

Dawood AS, 2002, DSP 2002: 14TH INTERNATIONAL CONFERENCE ON DIGITAL SIGNAL PROCESSING PROCEEDINGS, VOLS 1 AND 2, P845, DOI 10.1109/ICDSP.2002.1028222

[6] Rapid prototyping of mixed hardware and software systems [J].

Edwards, M ;

Fozard, B .

EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, PROCEEDINGS: ARCHITECTURES, METHODS AND TOOLS, 2002, :118-125

[7] Implementation of a probabilistic neural network for multi-spectral image classification on an FPGA based custom computing machine [J].

Figueiredo, MA ;

Gloster, C .

VTH BRAZILIAN SYMPOSIUM ON NEURAL NETWORKS, PROCEEDINGS, 1998, :174-179

[8]

Forsyth DA, 2002, COMPUTER VISION MODE

[9] VLSI implementation of online digital watermarking technique with difference encoding for 8-bit gray scale images [J].

Garimella, A ;

Satyanarayana, MVV ;

Kumar, RS ;

Murugesh, PS ;

Niranjan, UC .

16TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2003, :283-288

[10]

HAYNES SD, 1999, P 7 ANN IEEE S FIELD, P280

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