Scheduling of uniform multidimensional systems under resource constraints

被引:22
作者
Passos, NL [1 ]
Sha, EHM
机构
[1] Midwestern State Univ, Dept Comp Sci, Wichita Falls, TX 76308 USA
[2] Univ Notre Dame, Dept Comp Sci & Engn, Notre Dame, IN 46556 USA
基金
美国国家科学基金会;
关键词
ASIC design; multidimensional retiming; nested loops; push-up scheduling; rotation scheduling;
D O I
10.1109/92.736145
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Multidimensional (MD) systems are widely used to model scientific applications such as image processing, geophysical signal processing, and fluid dynamics. Such systems, usually, contain repetitive groups of operations represented by nested loops. The optimization of such loops, considering processing resource constraints, is required in order to improve their computational time. Most of the existing static scheduling mechanisms, used in the high-level synthesis of very large scale integration (VLSI) architectures, do not consider the parallelism inherent to the multidimensional characteristics of the problem. This paper explores the basic properties of MD loop pipelining and presents two novel techniques, multidimensional rotation scheduling and push-up scheduling, able to achieve the shortest possible schedule length. These new techniques transform a multidimensional data flow graph representing the problem, while assigning the loop operations to a schedule table. The multidimensional rotation scheduling is an iterative "heuristic" method, depending upon an user input, while the push-up scheduling algorithm is able to compute the new schedule in polynomial time. The optimal resulting schedule length and the efficiency of the algorithms are demonstrated by a series of practical experiments.
引用
收藏
页码:719 / 730
页数:12
相关论文
共 29 条
  • [1] [Anonymous], 1979, Computers and Intractablity: A Guide to the Theoryof NP-Completeness
  • [2] [Anonymous], P IEEE INT C COMP AI
  • [3] CHAO LF, 1993, P 7 INT PAR PROC S N, P1421
  • [4] CONSTRUCTIVE METHODS FOR SCHEDULING UNIFORM LOOP NESTS
    DARTE, A
    ROBERT, Y
    [J]. IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 1994, 5 (08) : 814 - 822
  • [5] DAVIDSON S, 1981, IEEE T COMPUT, V30, P460, DOI 10.1109/TC.1981.1675826
  • [6] Dudgeon D. E., 1984, MULTIDIMENSIONAL DIG
  • [7] FETTWEIS A, 1991, J VLSI SIGN, V3, P7, DOI 10.1007/BF00927832
  • [8] 2-D FILTER IMPLEMENTATIONS FOR REAL-TIME SIGNAL-PROCESSING
    GNANASEKARAN, R
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1988, 35 (05): : 587 - 590
  • [9] Gupta R., 1990, Proceedings of Supercomputing '90 (Cat. No.90CH2916-5), P388, DOI 10.1109/SUPERC.1990.130046
  • [10] HELD P, 1993, KLUW S VLSI, V228, P71