Transceiver Architecture Selection: Review, State-of-the-Art Survey and Case Study

Realizing multi-standard transceivers with maximum hardware reuse amongst the given standards is of great importance to minimize the manufacturing cost of emerging multi-service wireless terminals. A well-defined architecture in conjunction with a reconfigurable building-block synthesis is essential to formulate such a kind of tunable transceiver under a wide range of specifications. In this paper, we present both fundamental and state-of-the-art techniques that help selecting transceiver architecture for single-/multi-standard design. We begin by reviewing the basic schemes and examining their suitability for use in modern wireless communication systems (GSM, WCDMA, IEEE 802.11, Bluetooth, ZigBee and Ultra Wideband). The justifications are confirmed with the state-of-the-art choices through a survey (with 100+ references) of the most frequently used receiver and transmitter architectures reported in 1997 to 2005 IEEE solid-state circuit forums: ISSCC, CICC, VLSI and ESS-CIRC. State-of-the-art techniques for multi-standability are analyzed through careful case studies of a cellular receiver for GSM/DCS/PCS/WCDMA, and several WPAN/WLAN transceivers for Bluetooth and IEEE 802.11a/b/g. They disclose, on the architecture and circuit levels, many ideas that have successfully inspired the recent development of wireless circuits and systems.