With increasing demand for flat displays, slim telecom/IT power supplies, and portable devices, the use of Planar Transformers (PTs) is becoming mandatory to achieve slim and compact converter designs. In particular, PTs present a significant opportunity to replace tall and bulky wire-wound transformers in industry standard LLC converters. However, the Common-Mode (CM) noise generated by PTs remains a significant obstacle to making LLCs effective. This paper develops a paired-layers interleaving method to overcome CM noise in LLC PTs. By reducing noise, the paired-layers interleaving prevents the use of bulky CM chokes, helping to keep a slim/flat form factor for LLC converters with high power density. As well, the paired-layers interleaving maintains low AC resistance and leakage inductance, two desirable features in high efficiency transformers. The paired-layers interleaving successfully shields problematic turns with high dv/dt and overlaps the turns with the same dv/dt. As a result, circulating currents between primary and secondary (which are known as CM noise) are prevented, which leads to significant reduction of the converter's noise. The proposed PTs for LLC converters are validated using a 1kW prototype. Experimental results show that the proposed PT with 1.1nF parasitic capacitance generates 15-25dB less noise than a wire-wound transformer that has only 18pF parasitic capacitance, which is the result of using the paired-layers interleaving method.
