An 8-b nRERL microprocessor for ultra-low-energy applications

被引：16

作者：

Kim, S ^{[1
]}

Kwon, JH ^{[1
]}

Chae, SI ^{[1
]}

机构：

[1] Seoul Natl Univ, Syst Design Grp, Seoul 151742, South Korea

来源：

PROCEEDINGS OF THE ASP-DAC 2001: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2001 | 2001年

关键词：

D O I：

10.1109/ASPDAC.2001.913272

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We describe the design of an nRERL microprocessor for ultra-low-energy applications. nRERL (nMOS Reversible Energy Recovery Logic) is a new reversible adiabatic logic circuit using only nMOS transistors, which can be operated at the leakage-current level [1]. We focus on two main issues; first, the design of a full adiabatic microprocessor. which uses only adiabatic components for all the functional blocks, second, the energy consumption of the nRERL microprocessor including its clocked power generator (CPG). With the experimental results, the nRERL microprocessor consumed 26.22 pJ at 440 kHz.

引用

页码：27 / 28

页数：2