FPGA Accelerated Post-Quantum Cryptography

Recent advancement in quantum information processing technology has led to the emergence of advanced cryptography in the post-quantum era. Next generation cryptographic techniques aim to be mathematically resistant against any known attacks related to quantum computing, and can be easily implemented on traditional hardware platforms. The National Institutes of Standards and Technology (NIST) has entered the fourth-round standardization process of post-quantum cryptography (PQC). Software implementations of PQC candidates have been widely investigated. Interests in domain-specific hardware acceleration of PQC algorithms have risen, in particular using field-programmable gate arrays (FPGAs). While conventional general-purpose hardware platforms have been used for PQC implementations, modern FPGAs promise software-hardware co-optimisation, deep pipeline parallelism and trivial support for custom-precision arithmetic. Therefore, the time is ripe for reviewing recent FPGA-based PQC implementations. This article first surveys state-of-the-art advances in PQC implementations on FPGAs, including fast arithmetic, algorithm-hardware codesign approaches and open-source PQC hardware projects, then gives a brief review of recent attacks on PQC algorithms and their hardware implementations. Finally, we summarise the challenges for hardware implementations along with potential research directions in this promising field.