Reducing voltage sags through fault current limitation

被引：50

作者：

Tosato, F ^{[1
]}

Quaia, S ^{[1
]}

机构：

[1] Univ Trieste, Dept Elect Engn, DEEI, Trieste, Italy

来源：

IEEE TRANSACTIONS ON POWER DELIVERY | 2001年 / 16卷 / 01期

关键词：

fault current limitation; power quality; voltage sags;

D O I：

10.1109/61.905572

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Short circuit current limitation in distribution utilities can be an effective way to improve power quality, since the expected voltage sag amplitude during faults can be dramatically reduced. A simple series LC circuit tuned at the net frequency, with the capacitor shunted by a metal oxide varistor (MOV), proves to be a well suited limiter to reach the goal. In the paper, the properties of such a circuit are analyzed and its operation is investigated through computer simulation. The relevant pro and con aspects are outlined and discussed.

引用

页码：12 / 17

页数：6

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