An efficient design for general mixed radix FFT processors

被引:1
作者
Ma, Cuimei [1 ]
Chen, He [2 ]
Liu, Yijian [3 ]
Wang, Yanfei [1 ]
机构
[1] Chinese Acad Sci, Inst Elect, 19 North Sihuan Rd, Beijing 100190, Peoples R China
[2] Beijing Inst Technol, 5 South Zhongguancun St, Beijing 100081, Peoples R China
[3] Hefei Univ Technol, Tunxi Rd 193, Hefei 230009, Anhui, Peoples R China
关键词
generalized mixed-radix FFT; in place; access address; low complexity;
D O I
10.1587/elex.13.20160060
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A general mixed-radix FFT design for in-place strategy is derived and a low-complexity scheme for efficiently implementing mixed-radix FFTs is proposed. In this method, we develop an accumulator that can simply and practically generate addresses for the operands, as well as the twiddle factors. This approach extends the range of FFT size and reduces the hardware complexity of any non-power-of-two memory-based FFTs. Finally, the 3780-point FFT is taken an example to illustrate the validation of the proposed method.
引用
收藏
页数:7
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