A 12-bit 180 MS/s Current-steering DAC with Cascaded Local-element Matching Topologies

被引:0
作者
Park, Jun-Sang [1 ]
An, Tai-Ji [2 ]
Choi, Hee-Cheol [1 ]
Ahn, Gil-Cho [1 ]
Lee, Seung-Hoon [1 ]
机构
[1] Sogang Univ, Dept Elect Engn, Seoul 04107, South Korea
[2] Samsung Elect Co Ltd, Hwaseong 18448, South Korea
关键词
Digital-to-analog converter (DAC); current-steering; cascaded local-element-matching (C-LEM); full-thermometer-coded; source follower; CMOS; CALIBRATION;
D O I
10.5573/JSTS.2020.20.1.099
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper proposes a 12-bit 180 MS/s current-steering digital-to-analog converter (DAC) with cascaded local-element matching (C-LEM) schemes to significantly reduce the required number of current cells in the DAC to 28, a reduction of 99.32 % compared to the amount of required in the conventional 12-bit full thermometer-coded switching techniques. The bias circuits in the DAC use simple source follower-based level shifters to obtain the required bias voltages, simplifying the circuit configuration considerably. The prototype DAC shows the measured differential non-linearity (DNL) and integral non-linearity (INL) within 0.50 LSB and 0.78 LSB, respectively. The DAC achieves a peak spurious-free-dynamic range (SFDR) of 65.33 dB at 180 MS/s. The output current and total power of the prototype DAC are 10 mA and 38.2 mW, with analog and digital power supplies of 3.3 V and 1.8 V, respectively.
引用
收藏
页码:99 / 104
页数:6
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