A neural network algorithm for digital circuits test generation

被引：0

作者：

Stefanovic, J ^{[1
]}

机构：

[1] Slovak Univ Technol Bratislava, Fac Elect Engn & Informat Technol, Dept Comp Sci & Engn, Bratislava 81219, Slovakia

来源：

STATE OF THE ART IN COMPUTATIONAL INTELLIGENCE | 2000年

关键词：

digital circuits; test patterns; neural networks;

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

This work is a contribution to the methods of ATPG (Automatic Test Pattern Generation)for digital circuits, using neural network model. Some studies have already been devoted to the ATPG using neural networks at the logical level of circuit description. In this work, rite behavioral level of circuit description is examined. The proposed method is based on Hopfield's neural network model utilisation: the digital circuit description (behavioral statements) is converted to the neural network and the network simulation produces the input circuit signals. This network showed a small efficiency for ATPG purposes yet though it might be as an useful method to construct network by using higher description language.

引用

页码：56 / 60

页数：5