RTFTL: design and implementation of real-time FTL algorithm for flash memory

被引:5
作者
He, Qinlu [1 ]
Bian, Genqing [1 ]
Zhang, Weiqi [1 ]
Li, Zhen [2 ]
机构
[1] Xian Univ Architecture & Technol, Sch Informat & Control Engn, Xian 710054, Peoples R China
[2] Shaan Xi Inst Metrol Sci, Xian 710043, Peoples R China
基金
中国国家自然科学基金;
关键词
Storage; Flash memory; FTL; Real-time; Algorithm optimization; DATA ROUTING STRATEGY; TRANSLATION LAYER; DEDUPLICATION;
D O I
10.1007/s11227-022-04602-4
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The optimization of traditional FTL(Flash Translation Layer) algorithm is mainly aimed at the average response time of flash memory read and write operation on a flash chip, because of the Out-of-place update, traditional FTL algorithm writes data in a new free page each time, and a new block is assigned when a block is full. Therefore, when the flash memory is almost full, a written request will lead to a garbage collection, in which there will be many write copies, which will lead to a significant decrease in response time. In this paper, we optimize the traditional FTL algorithm and propose an FTL algorithm that guarantees real-time performance by shortening the worst response time of the request as a measure of the guaranteed flash Qos (Quality of Service) under the condition that the address mapping is provided the upper layer. The algorithm adopts the idea of space-for-time and spreads the written copy of flash memory to each write request so that the worst response time of the write request is significantly reduced. The algorithm also wears balancing considerations to the algorithm. After experimental verification, the proposed algorithm has advantages over existing FTL algorithms in terms of real-time performance and has a performance improvement of more than 11% in terms of average response time and wear balance. By the way, we add the wear-level module into an algorithm. According to improving the algorithm, the worst response time has shorten 47.6%.
引用
收藏
页码:18959 / 18993
页数:35
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