Built-in self-test for phase-locked loops

被引:19
作者
Hsu, CL [1 ]
Lai, YT [1 ]
Wang, SW [1 ]
机构
[1] Natl Dong Hwa Univ, Dept Elect Engn, Hualien 974, Taiwan
关键词
area overhead; built-in self-test (BIST); fault coverage; phase-locked loop (PLL); testing;
D O I
10.1109/TIM.2005.847343
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An effective built-in self-test (BIST) structure of a phase-locked loop (PILL) in digital applications is presented in this paper. The proposed BIST structure can identify possible faults in any block such as the phase detector, charge pump, loop filter, voltage-controlled oscillator and divide-by-N of the PLL. The key advantage of this approach is that it uses all existing blocks in PILL for measuring and testing, reducing the chip area overhead. Restated, the proposed approach does not alter any existing analog circuits. Rather, the proposed approach only adds some small circuits to the PLL and requires a slight modification of the digital part. The final test outputs are digital values which can increase the reliability of the proposed BIST structure. Physical chip design and fault simulation results indicate the characteristics of the proposed BIST structure, namely, high fault coverage (97.2%) and low area overhead (2.78%).
引用
收藏
页码:996 / 1002
页数:7
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