Influence of temperature on the threshold voltage and subthreshold slope of strained-Si/SiGe MOSFETs with polysilicon gates

被引:0
|
作者
Biswas, Abhijit [1 ]
Nath, Moumita Basak [2 ]
机构
[1] Univ Calcutta, Inst Radio Phys & Elect, 92 Acharya Prafulla Chandra Rd, Kolkata 700009, India
[2] Tech India, Dept Elect & Commun Engn, Kolkata 700091, India
来源
2009 INTERNATIONAL CONFERENCE ON EMERGING TRENDS IN ELECTRONIC AND PHOTONIC DEVICES AND SYSTEMS (ELECTRO-2009) | 2009年
关键词
strained-Si; threshold voltage; subthreshold slope; MOSFETs; MODEL;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, analytical models for threshold voltage V-t and subthreshold slope S for biaxially strained-Si channel nMOSFETs are proposed. Analytical approaches for predicting Vt and S are developed by considering the effect of strain on material and transport parameters, the effect of bandgap narrowing due to heavy channel doping, poly depletion effects and quantum mechanical effects for a wide temperature range 77 to 550 K. Accuracy of models have been verified by comparing analytical results obtained from the proposed model with the reported experimental data. Moreover, the model provides a physical insight for the variation of V-t and S for strained Si/ SiGe MOSFETs over a large temperature range.
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页码:41 / +
页数:2
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