A 130-nm 0.9-V 66-MHz 8-Mb (256K x 32) local SONOS embedded flash EEPROM

被引：20

作者：

Seo, MK ^{[1
]}

Sim, SH ^{[1
]}

Oh, MH ^{[1
]}

Lee, HS ^{[1
]}

Kim, SW ^{[1
]}

Cho, IW ^{[1
]}

Kim, GH ^{[1
]}

Kim, MG ^{[1
]}

机构：

[1] Samsung Elect Co Ltd, CORE Dev Team, Syst LSI Div, Yongin, Gyunggi Do, South Korea

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2005年 / 40卷 / 04期

关键词：

EEPROM; embedded flash memory; flash memory; high frequency; low operating current; program disturbance;

D O I：

10.1109/JSSC.2005.845564

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In a 0.13-mu m CMOS logic compatible process, a 256K x 32 bit (8 Mb) local SONOS embedded flash EEPROM was implemented using the ATD-assisted current sense amplifier (AACSA) for 0.9 V (0.7 similar to 1.4 V) low V-CC application. Read operation is performed at a high frequency of 66 MHz and shows a low current of typically 5 mA at 66-MHz; operating frequency. Program operation is performed for common source array with wide I/Os (x 32) by using the data-dependent source bias control scheme (DDSBCS). This novel local SONOS embedded flash EEPROM core has the cell size of 0.276 mu m(2) (16.3 F-2 /bit) and the program and erase time of 20 mu s and 20 ms, respectively.

引用

页码：877 / 883

页数：7

共 9 条

[1]

Cho IW, 2004, 2004 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, P240

[2]

DENNIS A, 2001, P AER C, V5, P2295

[3] A 1.4V 60MHz access, 0.25μm embedded flash EEPROM [J].

Kataoka, T ;

Fuchigami, I ;

Nishida, Y ;

Kimura, T ;

Aruga, R ;

Okuda, Y ;

Michiyama, J .

PROCEEDINGS OF THE IEEE 1999 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1999, :243-246

[4]

KIM JH, 2003, S VLSI TECHN, P31

[5] A 512-KB FLASH EEPROM EMBEDDED IN A 32-B MICROCONTROLLER [J].

KUO, C ;

WEIDNER, M ;

TOMS, T ;

CHOE, H ;

CHANG, KM ;

HARWOOD, A ;

JELEMENSKY, J ;

SMITH, P .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1992, 27 (04) :574-582

[6]

Lee YK, 2002, 2002 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, P208, DOI 10.1109/VLSIT.2002.1015455

[7]

TSAI WJ, 2001, IEDM, P719

[8] A low voltage SONOS nonvolatile semiconductor memory technology [J].

White, MH ;

Yang, YL ;

Purwar, A ;

French, ML .

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY PART A, 1997, 20 (02) :190-195

[9] On the go with SONOS [J].

White, MH ;

Adams, DA ;

Bu, JK .

IEEE CIRCUITS & DEVICES, 2000, 16 (04) :22-31

← 1 →