Stability of n-channel a-Si:H/nc-Si:H bilayer thin-film transistors under dynamic stress

The stability of n-channel bottom-gated thin-film transistors (TFTs), fabricated using as channel material hydrogenated amorphous silicon/nanocrystalline silicon bilayers, is investigated by applying on the gate pulses in the on-state and off-state regions of operation and dc bias on the drain electrode. Dynamic gate stress, with the source and drain electrodes grounded, were also performed to avoid the effect of dc stress during the dynamic stress. The degradation mechanisms are thoroughly studied for each type of stress conditions, including carrier injection in the SiNx gate insulator and generation of traps at the gate insulator/channel interface and in the active channel material. The common features and the differences in the TFT degradation behavior under different bias stress conditions are discussed. (C) 2008 American Institute of Physics.