Improving Simulation Speed and Accuracy for Many-Core Embedded Platforms with Ensemble Models

被引:0
作者
Paone, E. [1 ]
Vahabi, N. [1 ]
Zaccaria, V. [1 ]
Silvano, C. [1 ]
Melpignano, D. [2 ]
Haugou, G. [2 ]
Lepley, T. [2 ]
机构
[1] Politecn Milan, Milan, Italy
[2] STMicroelectronics, Grenoble, France
来源
DESIGN, AUTOMATION & TEST IN EUROPE | 2013年
关键词
DESIGN SPACE EXPLORATION; PERFORMANCE;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we introduce a novel modeling technique to reduce the time associated with cycle-accurate simulation of parallel applications deployed on many-core embedded platforms. We introduce an ensemble model based on artificial neural networks that exploits (in the training phase) multiple levels of simulation abstraction, from cycle-accurate to cycle-approximate, to predict the cycle-accurate results for unknown application configurations. We show that high-level modeling can be used to significantly reduce the number of low-level model evaluations provided that a suitable artificial neural network is used to aggregate the results. We propose a methodology for the design and optimization of such an ensemble model and we assess the proposed approach for an industrial simulation framework based on STMicroelectronics STHORM (P2012) many-core computing fabric.
引用
收藏
页码:671 / 676
页数:6
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