Transient thermal and mechanical modeling of 3D-IC structures

This paper discusses inter-wafer via stresses induced during wafer processing of three-dimensional integrated circuits (3D-ICs). The finite element method was used to model the transient thermal and mechanical responses of a bonded wafer pair consisting of copper inter-wafer vias, on-chip copper interconnects, and benzocylcobutene (BCB) bonding glue. Some impacts of the BCB glue, via size and via density on the stability of inter-wafer vias are evaluated for processes that include rapidly beating one of the substrates to 400degreesC. Results indicate that inter-wafer via failure due to the larger coefficient of thermal expansion of BCB relative to Cu needs to be considered in establishing process flows and inter-wafer via design rules. Stability degrades for small vias and/or low density of vias.