Evaluation of fully-integrated switching regulators for CMOS process technologies

被引:34
作者
Lee, Jaeseo [1 ]
Hatcher, Geoff
Vandenberghe, Lieven
Yang, Chih-Kong Ken
机构
[1] Adv Micro Devices Inc, Santa Clara, CA 95054 USA
[2] Univ Calif Los Angeles, Los Angeles, CA 90095 USA
关键词
CMOS integrated circuits; dc-dc converters; low power; on-chip power regulation; switching regulators;
D O I
10.1109/TVLSI.2007.902204
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a feasibile study of fully-integrated switching voltage regulators for power-optimized systems-on-chip (SoCs). In order to evaluate the power efficiency across a number of design variables, a compact macro-model of a regulator is created and validated. A key focus of the study is on the characteristics of the active and passive devices that are needed in order to maximize the efficiency of an on-chip regulator. With the macro-model, geometric programming is used to find the optimal characteristics for a given set of constraints such as load condition, process technology, and area. The achievable efficiencies for various current loads and across a range of technologies from 0.35-mu m to 90-nm CMOS process are analyzed. The power efficiency is found to be strongly dependent on the inductor technology and over 70% efficiency is possible with advanced inductor technologies.
引用
收藏
页码:1017 / 1027
页数:11
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