The study of transmission time delay model and performance evaluation architecture for fieldbus

In order to evaluate the key performances of fieldbuses, such as real time property, network efficiency and utilization, The paper analyzes all the factors which affect the time delay of fleldbus communication, then, the transmission time delay model is constructed, and the general and simplified transmission time delay formulas are given for analyzing the time delay characteristics of all kinds of fieldbuses. On base of studying three main MAC mechanisms: CSMA/AMP (Carrier Sense Multiple Access with Collision Detection/Arbitration Message Priority, VTP(Virtual Token Passing) and CSMA/CD(Carrier Sense multiple Access with Collision Detection), combining with the model, a general method was proposed to evaluate the whole performance of fieldbuses. According to the contribution of the time delay to the network performance, the general evaluation architecture was proposed which includes the throughput, network efficiency, transmission time delay, network utilization and stability, then, the performance of DeviceNet was evaluated under Bit-Strobe, COS and Polling data trigger modes.The simulated results indicate DeviceNet has good throughput and excellent real-time property in Change of State (COS), Bit-Strobe and Polling I/O data trigger modes when the traffic load is small, and the network efficiency is over 90%.