AUTOMATED GENERATION OF ANALYTICAL PROCESS TIME MODELS FOR CLUSTER TOOLS IN SEMICONDUCTOR MANUFACTURING

被引:0
作者
Kohn, Robert [1 ]
Rose, Oliver [1 ]
机构
[1] Tech Univ Dresden, Inst Appl Comp Sci, D-01062 Dresden, Saxony, Germany
来源
PROCEEDINGS OF THE 2011 WINTER SIMULATION CONFERENCE (WSC) | 2011年
关键词
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we present an approach to automatically create an analytical process time model for cluster tools using real-world data. The proposed model combines advantages of simple throughput models and discrete event simulation models. We consider the effect of small lot size and the slow down effect occurring when simultaneously processed lots interfere with each other. Especially the use of Slow Down Factors depending on a certain recipe combination and start delay adequately mirrors sequential and parallel processing mode. We also describe a modeling method that automatically leads to parameterized models with high accuracy. This study presents evaluation results gained from models, which we create from and test against real-world data gathered from past equipment events. We discuss exemplary processing behaviors by means of three examples. We conclude that the proposed analytical cluster tool model is suitable to predict process times with respect to accuracy and prediction coverage.
引用
收藏
页码:1803 / 1815
页数:13
相关论文
共 11 条
[1]  
Hosoe H., 2007, P INT S SEM MAN ISSM
[2]   Automated Semiconductor Equipment Modeling and Model Parameter Estimation using MES Data [J].
Kohn, Robert ;
Rose, Oliver ;
Werner, Sebastian .
2010 IEEE/SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE, 2010, :11-16
[3]   AUTOMATED GENERATION AND PARAMETERIZATION OF THROUGHPUT MODELS FOR SEMICONDUCTOR TOOLS [J].
Lange, Jan ;
Schmidt, Kilian ;
Boerner, Roy ;
Rose, Oliver .
2008 WINTER SIMULATION CONFERENCE, VOLS 1-5, 2008, :2335-+
[4]  
Niedermayer H, 2003, SIMULATION IN INDUSTRY, P349
[5]  
Niedermeyer H., 2004, P IND ENG RES C IERC
[6]   Single-wafer cluster tool performance: An analysis of the effects of redundant chambers and revisitation sequences on throughput [J].
Perkinson, TL ;
Gyurcsik, RS ;
McLarty, PK .
IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 1996, 9 (03) :384-400
[7]   Modeling semiconductor tools for small lotsize fab simulations [J].
Schmidt, Kilian ;
Weigang, Joerg ;
Rose, Oliver .
PROCEEDINGS OF THE 2006 WINTER SIMULATION CONFERENCE, VOLS 1-5, 2006, :1811-+
[8]  
Unbehaun R, 2007, PROCEEDINGS OF THE 2007 WINTER SIMULATION CONFERENCE, VOLS 1-5, P1734
[9]   The use of slow down factors for the analysis and development of scheduling algorithms for parallel cluster tools [J].
Unbehaun, Robert ;
Rose, Oliver .
PROCEEDINGS OF THE 2006 WINTER SIMULATION CONFERENCE, VOLS 1-5, 2006, :1840-+
[10]  
Wood S. C., 1994, IEEE/SEMI 1994 Advanced Semiconductor Manufacturing Conference and Workshop. Theme - Manufacturing Excellence: A Global Challenge. ASMC '94 Proceedings (Cat. No.94CH3475-1), P194, DOI 10.1109/ASMC.1994.588245