Supervisory Control Approach and its Symbolic Computation for Power-Aware RT Scheduling

Safety-critical systems implemented on multicore platforms need to satisfy stringent power dissipation constraints such as thermal design power (TDP) thresholds used by chip manufacturers. Power dissipation beyond TDP may trigger dynamic thermal management (DTM) in order to ensure thermal stability of the system. However, the application of DTM makes the system susceptible to higher unpredictability and performance degradations for real-time tasks. This paper proposes a formal scheduler synthesis framework that guarantees adherence to a system level peak power constraint while allowing optimal resource utilization in multicores. Our proposed framework makes use of supervisory control of timed discrete event systems as the underlying formalism. All steps starting from individual models to construction of the scheduler have been implemented through binary decision diagram based symbolic computation, so that the state-space complexity associated with the framework may be controlled. Furthermore, the synthesis framework has been extended to handle tasks with phased execution behavior. Conducted experiments have shown promising results and indicate to the practical efficacy of our approach.