Low-power GPS receiver design

被引：5

作者：

Meng, TH ^{[1
]}

机构：

[1] Stanford Univ, Dept Elect Engn, Stanford, CA 94305 USA

来源：

1998 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS-SIPS 98: DESIGN AND IMPLEMENTATION | 1998年

关键词：

D O I：

10.1109/SIPS.1998.715763

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper describes the design of a low-power Global Positioning System (GPS) receiver implemented in the CMOS technology. The primary GPS ranging signal is broadcast at the frequency of 1.575 GHz, modulated by a pseudo-noise sequence at a chip rate of 1 MHz. The design of this low-power GPS receiver emphasizes the circuit techniques and architectural trade-offs employed in minimizing the energy needed for each position estimate.

引用

页码：1 / 10

页数：10