Parallel FDTD calculation efficiency on computers with shared memory architecture

被引：0

作者：

Ciamulski, Tomasz ^{[1
]}

Hjelm, Mats ^{[1
]}

Sypniewski, Maciej ^{[2
]}

机构：

[1] Mid Sweden Univ, ITM, Elect Design Div, S-85170 Sundsvall, Sweden

[2] Warsaw Univ Technol, Radioelect, PL-0665 Warsaw, Poland

来源：

2007 WORKSHOP ON COMPUTATIONAL ELECTROMAGNETICS IN TIME-DOMAIN | 2007年

关键词：

electromagnetic analysis; FDTD methods; parallel algorithms; parallel processing; shared memory systems; distributed memory systems;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Fast parallel processing of the FDTD method is becoming very important, and its efficiency on different multiprocessor computer architectures should be carefully examined. Is it possible to have the same versatile parallel FDTD simulator working efficiently on a set of very different computer architectures? In contrast to distributed memory systems, shared memory systems can be built with a variety of memory configuration types (and subtypes) as well as combined with distributed memory systems. The paper focuses on viability of different shared memory architectures for parallel FDTD processing. Our analysis concerns the processing method suitable for both shared and distributed memory systems. The results of experiments comparing parallel processing efficiency on different shared memory machines are presented.

引用

页码：33 / +

页数：2