Green transistor -: A Vdd scaling path for future low power ICs

被引：58

作者：

Hu, Chenming ^{[1
]}

Chou, Daniel ^{[1
]}

Patel, Pratik ^{[1
]}

Bowonder, Anupama ^{[1
]}

机构：

[1] Univ Calif Berkeley, Dept Elect Engn & Comp Sci, Berkeley, CA 94720 USA

来源：

2008 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS (VLSI-TSA), PROCEEDINGS OF TECHNICAL PROGRAM | 2008年

关键词：

D O I：

10.1109/VTSA.2008.4530776

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

IC power consumption is not only a package thermal issue but also a significant and fast growing part of the world electricity consumption. A new low voltage transistor could contribute greatly to the need for a new V-dd scaling scenario. Green transistor (gFET) is based on tunneling and provides I-on and I-off far superior to MOSFET at 0.2V if suitable low-E-g material is introduced into IC manufacturing.

引用

页码：14 / +

页数：2

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