Phase noise improvement in fractional-N synthesizer with 90° phase shift lock

被引:0
|
作者
Park, J [1 ]
Maloberti, F [1 ]
机构
[1] Univ Texas, Dept Elect Engn, Dallas, TX 75235 USA
来源
PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I: ANALOG CIRCUITS AND SIGNAL PROCESSING | 2003年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An effective technique for phase noise improvement in a fractional-N synthesizer is described. The method requires using in a 90degrees phase shift lock a non-linear continuous-time or sampled-data block before the loop filter. Behavioral simulations on a fractional-N synthesizer incorporating different non-linear blocks and a second-order single bit sigma delta modulator show that it is possible to achieve phase noise improvements at medium frequency as good as 17 dB.
引用
收藏
页码:733 / 736
页数:4
相关论文
共 50 条
  • [31] A Wideband Phase Modulation Technique Adopting Fractional-N Direct Digital Frequency Synthesizer
    Zhang, Bohai
    You, Fei
    Tong, Renbin
    He, Songbai
    2014 IEEE RADIO & WIRELESS SYMPOSIUM (RWS), 2014, : 214 - 216
  • [32] A CMOS ΔΣ fractional-N frequency synthesizer with quantization noise pushing technique
    Yang, Yu-Che
    Lu, Shey-Shi
    2007 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2007, : 262 - 263
  • [33] A ΔΣ Fractional-N Synthesizer With Customized Noise Shaping for WCDMA/HSDPA Applications
    Yu, Xueyi
    Sun, Yuanfeng
    Rhee, Woogeun
    Ahn, Hyung Ki
    Park, Byeong-Ha
    Wang, Zhihua
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2009, 44 (08) : 2193 - 2201
  • [34] A ΔΣ Fractional-N Synthesizer with Customized Noise Shaping for WCDMA/HSDPA Applications
    Yu, Xueyi
    Sun, Yuanfeng
    Rhee, Woogeun
    Wang, Zhihua
    Ahn, Hyung Ki
    Park, Byeong-Ha
    PROCEEDINGS OF THE IEEE 2008 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2008, : 753 - +
  • [35] A hybrid ΔΣ fractional-N frequency synthesizer
    Riley, T
    Kostamovaara, J
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 2003, 50 (04): : 176 - 180
  • [36] A DIGITALLY CORRECTED FRACTIONAL-N SYNTHESIZER
    CHODORA, J
    HEWLETT-PACKARD JOURNAL, 1993, 44 (02): : 44 - 44
  • [37] Comparison of Mathematical and Physical Phase Noise Performance in Fractional-N Synthesizers
    Jansen, Kyle
    Kennedy, Michael Peter
    2020 31ST IRISH SIGNALS AND SYSTEMS CONFERENCE (ISSC), 2020, : 13 - 18
  • [38] Phase Noise and Spur Performance Limits for Fractional-N Frequency Synthesizers
    Kennedy, Michael Peter
    Mo, Hongjia
    Donnelly, Yann
    2015 26TH IRISH SIGNALS AND SYSTEMS CONFERENCE (ISSC), 2015,
  • [39] Prediction of Phase Noise and Spurs in a Nonlinear Fractional- ${N}$ Frequency Synthesizer
    Donnelly, Yann
    Kennedy, Michael Peter
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019, 66 (11) : 4108 - 4121
  • [40] A Low Phase Noise Fractional-N PLL for mmWave Telecom and RADAR Applications
    Naskas, Nikos
    Alexiou, Nikos
    Gkardiakos, Spyros
    Agathokleous, Aris
    Tsoutsos, Nikos
    Kontaxis, Kostas
    Ntounas, George
    Kousparis, Giannis
    2021 28TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (IEEE ICECS 2021), 2021,