A 3.3-V CMOS 10.7-MHz sixth-order bandpass ΣΔ modulator with 74-dB dynamic range

被引：23
作者：
Cusinato, P
Tonietto, D
Stefani, F
Baschirotto, A
机构：
[1] ST Microelect, I-20010 Milan, Italy
[2] Univ Lecce, Dept Innovat Engn, I-73100 Lecce, Italy
来源：
IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2001年 / 36卷 / 04期
关键词：
analog-digital conversion; IF systems; mixed analog-digital integrated circuits; sigma-delta modulation; switched-capacitor circuits;
D O I：
10.1109/4.913741
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A 3.3-V bandpass Sigma Delta modulator for IF sampling at 10.7 MHz in digital radio applications has been developed. The modulator presents a sixth-order single-loop architecture and features a 74-dB dynamic range in a 200-kHz signal bandwidth (FM signal), while for a 9-kHz signal bandwidth (AM signal) the dynamic range is 88 dB, The modulator has been integrated in a standard 0.35-mum CMOS technology using switched-capacitor technique and consumes 76 mW from a single 3.3-V supply.
引用
收藏
页码：629 / 638
页数：10
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