Low-Power Digital Gates in ERSFQ and nSQUID Technology

We designed and tested low-power digital gates based on the energy-efficient rapid single flux quantum (ERSFQ) and on the reversible nSQUID logic. The ERSFQ circuit consists of a series of 13 toggle flip-flops (TFFs), where the bias resistors are replaced by inductors which generate no energy dissipation in the static mode, resulting in a power consumption orders of magnitude below that of traditional RSFQ circuits during operation. The ERSFQ circuits were fabricated with HYPRES' standard 4.5-kA/cm(2) process and tested up to 20 GHz. The RF input level was about -25 dBm 50 Omega matched, and the output level was 400 mu Vpp. The nSQUID ring with "NOT" gates was fabricated with HYPRES' standard 1-kA/cm(2) process. The "0" and "1" input logic signals were realized injecting +/- 5 mA of current in a superconductive coil, obtaining 6 mu Vpp of amplitude as output signal. The test was performed at low frequency in order to verify the functionality and the ultralow power consumption.