A new Schmitt trigger circuit in a 0.13-μm 1/2.5-V CMOS process to receive 3.3-V input signals

被引：36

作者：

Chen, SL ^{[1
]}

Ker, MD ^{[1
]}

机构：

[1] Natl Chiao Tung Univ, Nanoelect & Gigascale Syst Lab, Inst Elect, Hsinchu 300, Taiwan

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2005年 / 52卷 / 07期

关键词：

gate-oxide reliability; input-output (I/O); mixed-voltage interface; Schmitt trigger;

D O I：

10.1109/TCSII.2005.850409

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new Schmitt trigger circuit, which is implemented by low-voltage devices to receive the high-voltage input signals without gate-oxide reliability problem, is proposed. The new proposed circuit, which can be operated in a 3.3-V signal environment without suffering high-voltage gate-oxide overstress, has been fabricated in a 0.13-mu m 1/2.5-V 1P8M CMOS process. The experimental results have confirmed that the measured transition threshold voltages of the new proposed Schmitt trigger circuit are about 1 and 2.5 V, respectively. The new proposed Schmitt trigger circuit is suitable for mixed-voltage input-output interfaces to receive input signals and reject input noise.

引用

页码：361 / 365

页数：5

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