Flexible Hybrid Electronics Technology Using Die-First FOWLP for High-Performance and Scalable Heterogeneous System Integration

被引：38

作者：

Fukushima, Takafumi ^{[1
]}

Alam, Arsalan ^{[2
]}

Hanna, Amir ^{[2
]}

Jangam, Siva Chandra ^{[2
]}

Bajwa, Adeel Ahmad ^{[2
]}

Iyer, Subramanian S. ^{[2
]}

机构：

[1] Tohoku Univ, Dept Mech Syst Engn, Sendai, Miyagi 9808579, Japan

[2] Univ Calif Los Angeles, Dept Elect Engn, Los Angeles, CA 90095 USA

来源：

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY | 2018年 / 8卷 / 10期

关键词：

Fan-out wafer-level packaging (FOWLP); flexible hybrid electronics (FHE); flexible substrate; heterogeneous integration; high-density interconnect; polydimethylsiloxane (PDMS); THIN-FILM TRANSISTORS; ROLL-TO-ROLL; PARYLENE-C; CIRCUITS; RESOLUTION; DEVICES;

D O I：

10.1109/TCPMT.2018.2871603

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

A technological platform is established for scalable flexible hybrid electronics based on a novel fan-out wafer-level packaging (FOWLP) methodology. Small dielets are embedded in flexible substrates we call FlexTrate. These dielets can be interconnected through high-density wirings formed in wafer-level processing. We demonstrate homogeneous integration of 625 (25 by 25) 1-mm(2) Si dielets and heterogeneous integration of GaAs and Si dielets with various thicknesses in a biocompatible polydimethylsiloxane (PDMS). In this paper, 8-mu m-pitch die-to-die interconnections are successfully implemented over a stress buffer layer formed on the PDMS. In addition, coplanarity between the PDMS and embedded dielets, die shift concerned in typical die-first FOWLP, and the bendability of the resulting FlexTrate are characterized.

引用

页码：1738 / 1746

页数：9

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