Topology for cascaded multilevel inverter

被引:62
作者
Odeh, Charles Ikechukwu [1 ]
Obe, Emeka S. [2 ]
Ojo, Olorunfemi [3 ]
机构
[1] Rhein Westfal TH Aachen, E ON Energy Res Ctr, Aachen, Germany
[2] Univ Nigeria, Dept Elect Engn, Nsukka, Nigeria
[3] Tennessee Technol Univ, Energy Syst Res Ctr, Dept Elect & Comp Engn, Cookeville, TN 38505 USA
关键词
network topology; invertors; cascade networks; bridge circuits; cascaded multilevel inverter topology; MLI topology; H-bridge; bidirectional auxiliary circuit; DC source; switches control; figure of merit; power loss; R-L load; CHB; SINGLE-PHASE; 5-LEVEL INVERTER; REDUCED NUMBER; CONTROL SCHEME; PWM INVERTER; CONVERTER; MODULATION; PARALLEL; CONFIGURATION; MINIMIZATION;
D O I
10.1049/iet-pel.2015.0375
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This study presents a topology for cascaded multilevel inverter (MLI). Each module is made up of H- and half-bridges, two isolated equal dc sources and a bidirectional auxiliary circuit. One leg of the H-bridge and the half-bridge are cut and the corresponding terminals are connected to the both ends of an equal split dc source. The free ends of the half-bridge are connected together to form a common output node of the inverter. The auxiliary circuit is inserted between the midpoint of the split dc sources and this very output node. The output point of the uncut leg of the H-bridge forms the remaining output node. With this circuit arrangement, proper control of the switches in the bridges and the auxiliary circuit, in each cascaded cell, can produce nine output voltage levels. A comparison is made between the proposed inverter, classical CHB and some of the recent developed MLI topologies with respect to specified figure of merits, as well as the per unit power losses. For two cascaded modules, simulation and experimental verifications are carried out on the proposed inverter topology for an R-L load; adequate results are presented.
引用
收藏
页码:921 / 929
页数:9
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