Analysis and Design of a Wideband High Efficiency CMOS Outphasing Amplifier

被引：14
作者：
van Schie, M. C. A. [1 ]
van der Heijden, M. P. [2 ]
Acar, M. [2 ]
de Graauw, A. J. M. [2 ]
de Vreede, L. C. N. [1 ]
机构：
[1] Delft Univ Technol, Delft, Netherlands
[2] NXP Semicond, Eindhoven, Netherlands
来源：
2010 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS RFIC SYMPOSIUM | 2010年
关键词：
Outphasing; power amplifiers; CMOS; LINC; Chireix; transformer; power combiner; TRANSMITTER;
D O I：
10.1109/RFIC.2010.5477315
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This work presents the analysis and design of a novel transformer-based power combining network for an efficient outphasing power amplifier (PA). The proposed power combining network was implemented on PCB together with two 65nm CMOS class-E PA's. Measurements show a peak output power of more than 30dBm over a 29% bandwidth around 700MHz. The peak output power at 700MHz equals 33.9dBm. The 10dB back-off efficiency is larger than 27.3% over the same 29% bandwidth. The 6dB back-off efficiency is larger than 46.4% over this bandwidth. The drain efficiency at 650MHz is larger than 50% over a 10dB power back-off range, which is, to our best knowledge, the highest back-off efficiency reported in a CMOS outphasing PA to date.
引用
收藏
页码：399 / 402
页数：4
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