Space Vector Modulation for Three-Phase Multilevel Switched-Capacitor Inverter

Multilevel inverters have received great attention from industry and academy in the last decades. This fact is due to their interesting advantages when compared to two-level topologies such as reduced output voltage distortion and reduced voltage over the power devices. The analysis and proposition of modulation strategies are very important for the proper operation of these converters. This paper proposes a Space Vector (SV) modulation strategy for a new three-phase multilevel switched capacitor inverter. The three nearest vectors are selected from a proposed SV diagram in order to minimize the output voltage distortion. Furthermore, the dwell times are defined and the selected vectors are disposed in suitable switching sequences. Finally, simulation and experimental results are obtained to demonstrate the good performance and applicability of the proposed technique.