Five-Level Converter with Selective Harmonic Elimination for STATCOM

被引：0

作者：

Balikci, Abdul ^{[1
]}

Akpinar, Eyup ^{[1
]}

机构：

[1] Dokuz Eylul Univ, Elect & Elect Engn, Kaynaklar Kampusu, TR-35160 Izmir, Turkey

来源：

2015 INTL AEGEAN CONFERENCE ON ELECTRICAL MACHINES & POWER ELECTRONICS (ACEMP), 2015 INTL CONFERENCE ON OPTIMIZATION OF ELECTRICAL & ELECTRONIC EQUIPMENT (OPTIM) & 2015 INTL SYMPOSIUM ON ADVANCED ELECTROMECHANICAL MOTION SYSTEMS (ELECTROMOTION) | 2015年

关键词：

Statcom; selective harmonic elimination; multilevel converter; MULTILEVEL CONVERTER; REDUCED NUMBER; VOLTAGE;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, five-level Static Synchronous Compensator (STATCOM) is analyzed with reduced number of power switches. The simulation has been performed by using a digital signal processing unit (DSP) and Matlab/Simulink together. Selective harmonic elimination, single phase real (P) and reactive (Q) power methods are used to control power flow in the delta connected converter. The response of STATCOM is investigated under inductive loading conditions. All the control algorithm is programmed on DSP and grid connected AC/DC converter is simulated in Matlab/Simulink. The predicted results from Matlab and DSP TMS320F28335 have been presented.

引用

页码：129 / 134

页数：6

共 50 条

[1] Common-Mode Voltage Suppression of a Five-Level Converter Based on Multimode Characteristics of Selective Harmonic Elimination PWM
Luo, Chuanchuan
Guan, Bo
ELECTRONICS, 2024, 13 (02)
[2] Single-carrier sinusoidal PWM-equivalent selective harmonic elimination for a five-level voltage source converter
Dahidah, Mohamed S. A.
Agelidis, Vassilios G.
ELECTRIC POWER SYSTEMS RESEARCH, 2008, 78 (11) : 1826 - 1836
[3] Five-level Selective Harmonic Elimination Method for High-power Parallel Current Source Converter
Shi W.
Zhang C.
Han J.
Li Q.
He J.
Dianli Xitong Zidonghua/Automation of Electric Power Systems, 2021, 45 (13): : 167 - 175
[4] A Novel Method for Real-time Selective Harmonic Elimination in Five-Level Converters
Abrishamifar, Adib
Arasteh, Mohammad
Golshan, Farzad
2016 7TH POWER ELECTRONICS AND DRIVE SYSTEMS & TECHNOLOGIES CONFERENCE (PEDSTC), 2016, : 523 - 528
[5] A Novel Analytical Method for Selective Harmonic Elimination Problem in Five-Level Converters
Golshan, Farzad
Abrishamifar, Adib
Arasteh, Mohammad
JOURNAL OF POWER ELECTRONICS, 2017, 17 (04) : 914 - 922
[6] A five-level symmetrically defined selective harmonic elimination PWM strategy: Analysis and experimental validation
Agelidis, Vassilios G.
Balouktsis, Anastasios I.
Dahidah, Mohamed S. A.
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2008, 23 (01) : 19 - 26
[7] Modeling and control of a Five-level Diode-Clamped Converter based StatCom
Dupuis, Dominic
Okou, Francis
2009 IEEE INTERNATIONAL CONFERENCE ON INDUSTRIAL TECHNOLOGY, VOLS 1-3, 2009, : 523 - 528
[8] Analytical Method for Pattern Generation in Five-Level Cascaded H-Bridge Inverter Using Selective Harmonic Elimination
Buccella, Concettina
Cecati, Carlo
Cimoroni, Maria Gabriella
Razi, Kaveh
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2014, 61 (11) : 5811 - 5819
[9] Real-Time Lagrange-Polynomials Selective Harmonic Elimination for Unbalanced Five-Level Inverters
Buccella, Concettina
Cimoroni, Maria Gabriella
Cecati, Carlo
Di Tommaso, Antonino Oscar
Meo, Santolo
Nevoloso, Claudio
Schettino, Giuseppe
IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 2024, 60 (04) : 6409 - 6421
[10] DC voltage control strategy for a five-level converter
Ishida, T
Matsuse, K
Sugita, K
Huang, L
Sasagawa, K
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2000, 15 (03) : 508 - 515

← 1 2 3 4 5 →