Accelerating Fully Homomorphic Encryption in Hardware

被引：53

作者：

Doroez, Yarkin ^{[1
]}

Ozturk, Erdinc ^{[2
]}

Sunar, Berk ^{[1
]}

机构：

[1] Worcester Polytech Inst, Dept Elect & Comp Engn, Worcester, MA 01906 USA

[2] Istanbul Commerce Univ, Dept Elect & Elect Engn, Istanbul, Turkey

来源：

IEEE TRANSACTIONS ON COMPUTERS | 2015年 / 64卷 / 06期

基金：

美国国家科学基金会;

关键词：

Fully homomorphic encryption; application specific hardware; cryptographic accelerators; large-integer multiplication; MULTIPLICATION; ALGORITHM;

D O I：

10.1109/TC.2014.2345388

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We present a custom architecture for realizing the Gentry-Halevi fully homomorphic encryption (FHE) scheme. This contribution presents the first full realization of FHE in hardware. The architecture features an optimized multi-million bit multiplier based on the Schonhage Strassen multiplication algorithm. Moreover, a number of optimizations including spectral techniques as well as a precomputation strategy is used to significantly improve the performance of the overall design. When synthesized using 90 nm technology, the presented architecture achieves to realize the encryption, decryption, and recryption operations in 18.1 msec, 16.1 msec, and 3.1 sec, respectively, and occupies a footprint of less than 30 million gates.

引用

页码：1509 / 1521

页数：13

共 24 条

[1]

[Anonymous], 2012, 2012_IEEE_conference_on_high performance_extreme_computing, DOI [10.1109/HPEC.2012.6408660, DOI 10.1109/HPEC.2012.6408660, DOI 10.1109/PEAM.2012.6612493]

[2]

[Anonymous], 2014, ACM T COMPUTATION TH

[3]

BARRETT P, 1987, LECT NOTES COMPUT SC, V263, P311

[4]

Brakerski Z, 2011, LECT NOTES COMPUT SC, V6841, P505, DOI 10.1007/978-3-642-22792-9_29

[5] Efficient Fully Homomorphic Encryption from (Standard) LWE [J].

Brakerski, Zvika ;

Vaikuntanathan, Vinod .

2011 IEEE 52ND ANNUAL SYMPOSIUM ON FOUNDATIONS OF COMPUTER SCIENCE (FOCS 2011), 2011, :97-106

[6] AN ALGORITHM FOR MACHINE CALCULATION OF COMPLEX FOURIER SERIES [J].

COOLEY, JW ;

TUKEY, JW .

MATHEMATICS OF COMPUTATION, 1965, 19 (90) :297-&

[7]

Cousins D.B., 2012, HIGH PERFORMANCE EXT, P1

[8]

Craven S., 2004, 7 INT C MIL AER PROG

[9]

Emmart N., 2011, 2011 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum, P1781, DOI 10.1109/IPDPS.2011.336

[10] HIGH PRECISION INTEGER ADDITION, SUBTRACTION AND MULTIPLICATION WITH A GRAPHICS PROCESSING UNIT [J].

Emmart, Niall ;

Weems, Charles .

PARALLEL PROCESSING LETTERS, 2010, 20 (04) :293-306

← 1 2 3 →