Using reconfigurable computers for DSP image processing

被引:0
|
作者
Taher, Mohamed [1 ]
El-Ghazawi, Tarek [2 ]
机构
[1] Ain Shams Univ, Cairo, Egypt
[2] George Washington Univ, Washington, DC 20052 USA
来源
IDT 2007: SECOND INTERNATIONAL DESIGN AND TEST WORKSHOP, PROCEEDINGS | 2007年
关键词
D O I
暂无
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Reconfigurable Computers (RCs) are those parallel systems that are designed around multiple general-purpose processors and multiple field programmable gate array (FPGA) chips. These systems call leverage the synergism. between conventional processors and FPGAs to provide low-level hardware functionality at the same level of programmability as general-purpose computers. RCs have proposed very high processing capabilities for computationally intensive applications such as Image Processing. This is due to the inherently parallel operation paradigm of the FPGA hardware. In this paper we present die design and implementation of image processing kernels for RCs. This library of kernels have been tested and verified for performance on one of the state-of-the-art reconfigurable computers, SRC-6E. This paper shows that RCs are between 8 to 400 times faster than comparable Pentiums for image based tasks.
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收藏
页码:55 / +
页数:2
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