Improved error-table compensation of A/D converters

被引:19
作者
Tsimbinos, J
Lever, KV
机构
[1] Def Sci & Technol Org, Salisbury, SA 5108, Australia
[2] Univ S Australia, Inst Telecommun Res, Pooraka, SA 5095, Australia
来源
IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS | 1997年 / 144卷 / 06期
关键词
ADC compensation; phase-plane error table; state-space error table;
D O I
10.1049/ip-cds:19971589
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Previous work has shown that phase-plane and state-space error tables can be used to improve the linearity of analogue-to-digital converters. The calibration signals used to generate the error table were incremented amplitude sinusoids, leaving unfilled regions in the table that correspond to the high input signal frequencies and amplitude levels, and usually highest error. The paper proposes the use of more elaborate calibration signals for generating the error tables. It is shown that the use of pseudorandom calibration signals leads to superior error-table coverage and improved compensation over the frequency range of interest. The error-table compensation method is briefly compared with an alternative technique based on the Volterra inverse.
引用
收藏
页码:343 / 349
页数:7
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