A heterodyne phase locked loop with GHz acquisition range for coherent locking of semiconductor lasers in 0.13μm CMOS

被引:5
作者
Aflatouni, Firooz [1 ]
Momeni, Omeed [1 ]
Hashemi, Hossein [1 ]
机构
[1] Univ So Calif, Dept Elect Engn Electrophys, Los Angeles, CA 90089 USA
来源
PROCEEDINGS OF THE IEEE 2007 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2007年
关键词
phase locked loops; integrated optics; optical phase locked loops;
D O I
10.1109/CICC.2007.4405774
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A heterodyne electro-optical phase locked loop (EO-PLL) architecture is proposed that can lock the frequency and phase of semiconductor lasers. An aided acquisition circuit inspired by the combination of RF image rejection receivers and digital PLL architectures is incorporated in the EOPLL to extend the frequency acquisition range to GHz, even in the presence of large optical delays in the EOPLL. An integrated circuit prototype is implemented in a 0.13 mu m CMOS technology and includes a wide bandwidth transimpedance amplifier and the PLL circuitry. Measurement results for the stand-alone chip and the locking of Vertical Cavity Surface Emitting Lasers (VCSEL) using the implemented chip are reported.
引用
收藏
页码:463 / 466
页数:4
相关论文
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