Hardware implementation of an elliptic curve processor over GF(p)

被引：44

作者：

Örs, SB ^{[1
]}

Batina, L ^{[1
]}

Preneel, B ^{[1
]}

Vandewalle, J ^{[1
]}

机构：

[1] Katholieke Univ Leuven, ESAT, SCD, COSIC, B-3001 Louvain, Belgium

来源：

IEEE INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES, AND PROCESSORS, PROCEEDINGS | 2003年

关键词：

elliptic curve cryptosystems; modular operations; FPGA;

D O I：

10.1109/ASAP.2003.1212866

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper describes a hardware implementation of an arithmetic processor which is efficient for bit-lengths suitable for both commonly used types of Public Key Cryptography (PKC), i.e., Elliptic Curve (EC) and RSA Cryptosystems. Montgomery modular multiplication in a systolic array architecture is used for modular multiplication. The processor consists of special operational blocks for Montgomery Modular Multiplication, modular addition/subtraction, EC Point doubling/addition, modular multiplicative inversion, EC point multiplier, projective to affine coordinates conversion and Montgomery to normal representation conversion.

引用

页码：433 / 443

页数：11

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