A 110 nW Resistive Frequency Locked On-Chip Oscillator with 34.3 ppm/°C Temperature Stability for System-on-Chip Designs

被引:52
作者
Choi, Myungjoon [1 ]
Jang, Taekwang [2 ]
Bang, Suyoung [2 ]
Shi, Yao [2 ]
Blaauw, David [2 ]
Sylvester, Dennis [2 ]
机构
[1] Univ Michigan, Dept Elect Engn & Comp Sci, Ann Arbor, MI 48105 USA
[2] Univ Michigan, Ann Arbor, MI 48105 USA
关键词
Terms-Low power; oscillators; timer; temperature compensation; wireless sensor node;
D O I
10.1109/JSSC.2016.2586178
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This work presents a sub-mu W on-chip oscillator for fully integrated system-on-chip designs. The proposed oscillator introduces a resistive frequency locked loop topology for accurate clock generation. In this topology, a switched-capacitor circuit is controlled by an internal voltage-controlled oscillator (VCO), and the equivalent resistance of this switched-capacitor is matched to a temperature-compensated on-chip resistor using an ultra-low power amplifier. This design yields a temperature-compensated frequency from the internal VCO. The approach eliminates the traditional comparator from the oscillation loop; this comparator typically consumes a significant portion of the total oscillator power and limits temperature stability in conventional RC relaxation oscillators due to its temperature-dependent delay. A test chip is fabricated in 0.18 mu m CMOS that exhibits a temperature coefficient of 34.3 ppm/degrees C with long-term stability of less than 7 ppm (12 second integration time) while consuming 110 nW at 70.4 kHz. A radio transmitter circuit that uses the proposed oscillator as a baseband timing source is also presented to demonstrate a system-on-chip design using this oscillator.
引用
收藏
页码:2106 / 2118
页数:13
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