Efficient FPGA-Based Implementations of MIMO-OFDM Physical Layer

Recently, Multiple-input Multiple-output and Orthogonal Frequency Division Multiplexing (MIMO-OFDM)-based technologies have been deployed in advanced wireless communication systems. In this paper, we present a prototype Field Programmable Gate Array (FPGA) design for an efficient physical layer implementation of a MIMO-OFDM technique. We propose a pipelined architecture using a Fast Fourier Transform that is shared across modulations for the MIMO-OFDM system. As more channels are used, more resources can be saved by using our proposed architecture. Experimental results show that the proposed implementation saves at least 40 percent of the hardware resources, while achieving the same data rate as known baseline MIMO-OFDM implementations. In addition, we propose efficient hardware implementation of the Almouti encoder and decoder. They are also designed to use minimum hardware resource by using the proposed architecture.