An Algorithm for Power Supply Noise Reduction Inserting Decoupling Capacitor in 2D and 3D IC Power Delivery Networks

VLSI technology enters into the ultra-nanometer era and supply voltages continue to reduce. But, chip density is increased. It creates power integrity problems even worse. Allocating decoupling capacitances (decaps) is a known approach to alleviating supply noise problems. The availability of white space for allocating decoupling capacitors is a challenging task due to the increase in circuit density and reduction in size. In this work, an algorithm is introduced to mitigate power supply noise. The proposed algorithm provides an effective assignment of decoupling capacitors with fewer capacitors that satisfy a predefined target impedance. Next, we also study IR drops for 2D and 3D ICs. TSV optimization is also done. The results are compared with recent works and the outcomes are quite inspiring.