A compiler-compiler for Codesign

被引:0
|
作者
Carchiolo, V [1 ]
Malgeri, M [1 ]
Mangioni, G [1 ]
机构
[1] Univ Catania, Fac Ingn, Ist Informat & Telecommun, I-95125 Catania, Italy
来源
INTERNATIONAL CONFERENCE ON POLITICS AND INFORMATION SYSTEMS: TECHNOLOGIES AND APPLICATIONS, PROCEEDINGS | 2003年
关键词
hw/sw codesign; compiler; formal methods;
D O I
暂无
中图分类号
G2 [信息与知识传播];
学科分类号
05 ; 0503 ;
摘要
Growing complexity of hardware/software embedded devices coupled with short time to market requirement is getting older the traditional approaches. Codesign, i.e. integrated development of both hardware and software aims at providing a common and integrated framework for a large set of devices. Till now, several methodologies has been proposed using different tools for each development phase, thus requiring people to be acquaint to several background. Development of compiler able to join all phase providing a unique interface may be a step behind, but it is not possible to create such a tool for all possible architecture. A solution to this matter is the development of a "compiler-compiler", that is a tool able to generate a customized compiler for any architecture.
引用
收藏
页码:174 / 177
页数:4
相关论文
共 50 条
  • [41] VHDL Compiler with Natural Parallel Comands Execution
    Zhukovskyy, Viktor
    Dmitriev, Dmytro
    Zhukovska, Nataliia
    Safonyk, Andriy
    Sydor, Andrij
    IEEE EUROCON 2021 - 19TH INTERNATIONAL CONFERENCE ON SMART TECHNOLOGIES, 2021, : 331 - 337
  • [42] A compiler to implement LOTOS specifications in distributed environments
    Yasumoto, K
    Higashino, T
    Taniguchi, K
    COMPUTER NETWORKS, 2001, 36 (2-3) : 291 - 310
  • [43] Identification of Misleading Location Information in Compiler Diagnoses
    Wang, Miaoying
    Ji, Weixing
    Jing, Dejiang
    Liu, Hui
    2020 27TH ASIA-PACIFIC SOFTWARE ENGINEERING CONFERENCE (APSEC 2020), 2020, : 460 - 464
  • [44] Automated Just-In-Time Compiler Tuning
    Hoste, Kenneth
    Georges, Andy
    Eeckhout, Lieven
    CGO 2010: THE EIGHTH INTERNATIONAL SYMPOSIUM ON CODE GENERATION AND OPTIMIZATION, PROCEEDINGS, 2010, : 62 - 72
  • [45] Reduction of instruction increase overhead by STRAIGHT compiler
    Koizumi, Toru
    Nakae, Satoshi
    Fukuda, Akifumi
    Irie, Hidetsugu
    Sakai, Shuichi
    2018 SIXTH INTERNATIONAL SYMPOSIUM ON COMPUTING AND NETWORKING WORKSHOPS (CANDARW 2018), 2018, : 92 - 98
  • [46] A GPGPU Compiler for Memory Optimization and Parallelism Management
    Yang, Yi
    Xiang, Ping
    Kong, Jingfei
    Zhou, Huiyang
    PLDI '10: PROCEEDINGS OF THE 2010 ACM SIGPLAN CONFERENCE ON PROGRAMMING LANGUAGE DESIGN AND IMPLEMENTATION, 2010, : 86 - 97
  • [47] An Efficient Compiler Framework for Cache Bypassing on GPUs
    Liang, Yun
    Xie, Xiaolong
    Sun, Guangyu
    Chen, Deming
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2015, 34 (10) : 1677 - 1690
  • [48] Compiler support for scalable and efficient memory systems
    Barua, R
    Lee, W
    Amarasinghe, S
    Agarwal, A
    IEEE TRANSACTIONS ON COMPUTERS, 2001, 50 (11) : 1234 - 1247
  • [49] TAFFO: The compiler-based precision tuner
    Cattaneo, Daniele
    Chiari, Michele
    Agosta, Giovanni
    Cherubin, Stefano
    SOFTWAREX, 2022, 20
  • [50] Path-based Scheduling in a Hardware Compiler
    Gu, Ruirui
    Forin, Alessandro
    Pittman, Neil
    2010 DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2010), 2010, : 1317 - 1320