Integration of AES on Heterogeneous Many-Core system

被引：1

作者：

Anwar, Hassan ^{[1
]}

Daneshtalab, Masoud ^{[1
]}

Ebrahimi, Masoumeh ^{[1
]}

Ramirez, Marco ^{[1
]}

Plosila, Juha ^{[1
]}

Tenhunen, Hannu ^{[1
]}

机构：

[1] Univ Turku, Dept Informat Technol, Turku, Finland

来源：

2014 22ND EUROMICRO INTERNATIONAL CONFERENCE ON PARALLEL, DISTRIBUTED, AND NETWORK-BASED PROCESSING (PDP 2014) | 2014年

关键词：

Many-Core; Field Programmable Gate Array; AES; Network Interface; Crypto-Core;

D O I：

10.1109/PDP.2014.86

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Increasing in the transistor density in a single chip makes it possible for many-core systems to utilize design space for implementing complex embedded systems. In this paper, we propose an architecture for heterogeneous many-core system to integrate block cipher algorithm which is based on Advanced Encryption Standard (AES). In order to implement AES as a crypto-core along with heterogeneous many-core system two different approaches are proposed. In the first approach, the platform is composed of an AES module, a crypto-core, a network interface, and an internal memory which are managed through a controller. In the second approach, the platform is composed of a Direct Memory Access (DMA), network interface, an internal memory, and a microprocessor in which the AES module is integrated as a crypto-core. Both approaches have been analyzed and compared in terms of area overhead and performance.

引用

页码：424 / 427

页数：4

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