共 50 条
- [31] FPGA implementation of an interpolation processor for soft-decision decoding of Reed-Solomon codes 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, 2007, : 2100 - +
- [32] FPGA implementation of an interpolation processor for soft-decision decoding of reed-solomon codes Proc IEEE Int Symp Circuits Syst, 2007, (2100-2103):
- [33] Efficient interpolation and factorization in algebraic soft-decision decoding of Reed-Solomon codes 2003 IEEE INTERNATIONAL SYMPOSIUM ON INFORMATION THEORY - PROCEEDINGS, 2003, : 365 - 365
- [35] Soft-decision decoding of Reed-Solomon codes on magnetic recording channels with erasures 2003 IEEE INTERNATIONAL CONFERENCE ON COMMUNICATIONS, VOLS 1-5: NEW FRONTIERS IN TELECOMMUNICATIONS, 2003, : 2909 - 2913
- [36] A VLSI architecture for interpolation in soft-decision list decoding of Reed-Solomon codes 2002 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS, 2002, : 39 - 44
- [38] Efficient multiplicity calculation for algebraic soft-decision decoding of Reed-Solomon codes WIRELESS COMMUNICATIONS & MOBILE COMPUTING, 2011, 11 (10): : 1323 - 1330
- [39] Efficient fast interpolation architecture for soft-decision decoding of reed-solomon codes 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS, 2006, : 4823 - +
- [40] Modified Low-Complexity Chase Soft-Decision Decoder of Reed-Solomon Codes JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2012, 66 (01): : 3 - 13