Application and Thermal-reliability-aware Reinforcement Learning Based Multi-core Power Management

被引:23
作者
Dinakarrao, Sai Manoj Pudukotai [1 ]
Joseph, Arun [2 ]
Haridass, Anand [2 ]
Shafique, Muhammad [3 ,6 ]
Henkel, Joerg [4 ,7 ]
Homayoun, Houman [5 ]
机构
[1] George Mason Univ, 4400 Patriot Circle, Fairfax, VA 22030 USA
[2] IBM Syst, Bannerghatta Rd, Bangalore, Karnataka, India
[3] Vienna Univ Technol TU Wien, Vienna, Austria
[4] Karlsruhe Inst Technol, Karlsruhe, Germany
[5] Univ Calif Davis, 1 Shields Ave, Davis, CA 95616 USA
[6] Vienna Univ Technol, Inst Comp Engn, Embedded Comp Syst, Treitlstr 3, A-1040 Vienna, Austria
[7] Haid und Neu Str 7,Bldg 07-21, D-76131 Karlsruhe, Germany
关键词
Multi-core processor; reinforcement learning; application reliability; thermal reliability; power management; DVFS; ENERGY; MICROPROCESSOR; VOLTAGE; MEMORY;
D O I
10.1145/3323055
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Power management through dynamic voltage and frequency scaling (DVFS) is one of the most widely adopted techniques. However, it impacts application reliability (due to soft errors, circuit aging, and deadline misses). However, increased power density impacts the thermal reliability of the chip, sometimes leading to permanent failure. To balance both application- and thermal-reliability along with achieving power savings and maintaining performance, we propose application- and thermal-reliability-aware reinforcement learning-based multi-core power management in this work. The proposed power management scheme employs a reinforcement learner to consider the power savings and variations in the application and thermal reliability caused by DVFS. To overcome the computational overhead, the power management decisions are determined at the application-level rather than per-core or system-level granularity. Experimental evaluation of proposed multi-core power management on a microprocessor with up to 32 cores, running PARSEC applications, was done to demonstrate the applicability and efficiency of the proposed technique. Compared to the existing state-of-the-art techniques, the proposed technique enables an average energy savings of up to similar to 20%, up to 4.926 degrees C temperature reduction without degradation in the application- and thermal-reliability.
引用
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页数:19
相关论文
共 60 条
[1]  
[Anonymous], P IEEE INT S HIGH PE
[2]  
[Anonymous], LECT NOTES COMPUTER
[3]  
[Anonymous], P IEEE INT C EMB REA
[4]  
[Anonymous], P IEEE IFIP INT C DE
[5]  
[Anonymous], P DES AUT C
[6]  
[Anonymous], P IEEE ACM INT C COM
[7]  
[Anonymous], P DES AUT TEST EUR C
[8]  
[Anonymous], P IEEE INT ON LIN TE
[9]  
[Anonymous], P IEEE INT C COMP DE
[10]  
[Anonymous], J LOW POWER ELECT