MA2TG:: A functional test program generator for microprocessor verification

被引:0
作者
Li, T
Zhu, D
Guo, Y
Liu, GJ
Li, SK
机构
来源
DSD 2005: 8th Euromicro Conference on Digital System Design, Proceedings | 2005年
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A novel specification driven and constraints solving based method to automatically generate test programs from simple to complex ones for advanced microprocessors is presented in this paper. Our microprocessor architectural automatic test program generator (MA(2)TQ) can produce not only random test programs but also a sequence of instructions for a specific constraint by specifying a user constraints file. The proposed methodology makes three important contributions. First, it simplifies the microprocessor architecture modeling and eases adoption of architecture modification via architecture description language (ADL) specification. Second, it generates test programs for specific constraints utilizing the power of state-to-art constraints solving techniques. Finally, the number of test program for microprocessor verification and the verification time are dramatically reduced We applied this method on DLX processor to illustrate the usefulness of our approach.
引用
收藏
页码:176 / 183
页数:8
相关论文
共 11 条
[1]   VERIFICATION OF THE IBM RISC SYSTEM 6000 BY A DYNAMIC BIASED PSEUDORANDOM TEST PROGRAM GENERATOR [J].
AHARON, A ;
BARDAVID, A ;
DORFMAN, B ;
GOFMAN, E ;
LEIBOWITZ, M ;
SCHWARTZBURD, V .
IBM SYSTEMS JOURNAL, 1991, 30 (04) :527-538
[2]  
AHARON A, 1995, DAC
[3]   Using a constraint satisfaction formulation and solution techniques for random test program generation [J].
Bin, E ;
Emek, R ;
Shurek, G ;
Ziv, A .
IBM SYSTEMS JOURNAL, 2002, 41 (03) :386-402
[4]   AVPGEN - A TEST GENERATOR FOR ARCHITECTURE VERIFICATION [J].
CHANDRA, A ;
IYENGAR, V ;
JAMESON, D ;
JAWALEKAR, R ;
NAIR, I ;
ROSEN, B ;
MULLEN, M ;
YOON, J ;
ARMONI, R ;
GEIST, D ;
WOLFSTHAL, Y .
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 1995, 3 (02) :188-200
[5]  
HALAMBI A, DATE 1999
[6]  
HALAMBI A, 2004, EFC CONSTRAINTS SOLV
[7]  
Hennessy J. L, 2012, COMPUTER ARCHITECTUR
[8]  
MALIK N, 1997, P 8 IEEE INT WORKSH
[9]  
MISHRA P, DATE 2004
[10]  
RUBIN S, 1999, ICASSP 99