Automatic High-Level Hardware Checkpoint Selection for Reconfigurable Systems

被引:10
|
作者
Bourge, Alban [1 ]
Muller, Olivier [1 ]
Rousseau, Frederic [1 ]
机构
[1] Univ Grenoble Alpes, TIMA Lab, F-38031 Grenoble, France
来源
2015 IEEE 23RD ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM) | 2015年
关键词
FPGA; HLS; CAD; hardware context switch;
D O I
10.1109/FCCM.2015.8
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Modern FPGAs provide great computational power and flexibility but there is still room for improving their performances. For example multi-user approaches are particularly underdeveloped as they require specific mechanisms still to be automated. Sharing an FPGA resource between applications or users requires a context switch ability. The latter enables pausing and resuming applications at system demand. This paper presents a method that automatically selects a good execution point, called hardware checkpoint, to perform a context switch on an FPGA. The method relies on a static analysis of the finite state machine of a circuit to select the checkpoint states. The obtained selection ensures that the context switch mechanism respects a given latency and tries to minimize the mechanism costs. The method takes advantage of its integration in an open-source HLS tool and preliminary results highlight its efficiency.
引用
收藏
页码:155 / 158
页数:4
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