Mixed-signal test automation: are we there yet?

被引:2
作者
Leger, Gildas [1 ]
Barragan, Manuel J. [2 ,3 ]
机构
[1] Univ Seville, CSIC, Inst Microlect Sevilla, Av Amer Vespucio S-N, Seville 41092, Spain
[2] Univ Grenoble Alpes, CNRS, Grenoble INP, TIMA, F-38000 Grenoble, France
[3] Univ Grenoble Alpes, Inst Engn, Grenoble, France
来源
2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2018年
关键词
ANALOG; OPTIMIZATION;
D O I
10.1109/ISCAS.2018.8351734
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Testing analog, mixed-signal and RF (AMS-RF) circuits represents a significant cost component for testing complex SoCs. Moreover, AMS-RF test generation and validation are still largely handcrafted tasks that rely on expert design knowledge for each particular Device Under Test (DUT). Mixed-signal test automation has been sought by the test community for the last decades, trying to mimic the success of digital test approaches. Indeed, in the digital domain, test is vastly automated and standard techniques are already available (ATPGs, BIST, scan registers, etc.). In the last decade, a methodology based on leveraging the power of machine learning algorithms has been proposed for AMS-RF circuits that opens the door to a higher level of automation. In this paper we review recent results in this line and try to put together what could be such a complete methodology and what remains to be done.
引用
收藏
页数:5
相关论文
共 52 条
  • [21] Efficiency evaluation of analog/RF alternate test: Comparative study of indirect measurement selection strategies
    Larguech, Syhem
    Azais, Florence
    Bernard, Serge
    Comte, Mariane
    Kerzerho, Vincent
    Renovell, Michel
    [J]. MICROELECTRONICS JOURNAL, 2015, 46 (11) : 1091 - 1102
  • [22] Leger Gildas, 2016, 2016 21st IEEE European Test Symposium (ETS), P1, DOI 10.1109/ETS.2016.7519307
  • [23] Brownian distance correlation-directed search: A fast feature selection technique for alternate test
    Leger, Gildas
    Barragan, Manuel J.
    [J]. INTEGRATION-THE VLSI JOURNAL, 2016, 55 : 401 - 414
  • [24] Leger G, 2015, DES AUT TEST EUROPE, P1389
  • [25] Liaperdos J, 2015, DES AUT TEST EUROPE, P1030
  • [26] Maliuk D, 2012, IEEE VLSI TEST SYMP, P62, DOI 10.1109/VTS.2012.6231081
  • [27] Feature selection based on mutual information: Criteria of max-dependency, max-relevance, and min-redundancy
    Peng, HC
    Long, FH
    Ding, C
    [J]. IEEE TRANSACTIONS ON PATTERN ANALYSIS AND MACHINE INTELLIGENCE, 2005, 27 (08) : 1226 - 1238
  • [28] Iddq testing for CMOS VLSI
    Rajsuman, R
    [J]. PROCEEDINGS OF THE IEEE, 2000, 88 (04) : 544 - 566
  • [29] Hierarchical modeling, optimization, and synthesis for system-level analog and RF designs
    Rutenbar, Rob A.
    Gielen, Georges G. E.
    Roychowdhury, Jaijeet
    [J]. PROCEEDINGS OF THE IEEE, 2007, 95 (03) : 640 - 669
  • [30] Efficient EVM Testing of Wireless OFDM Transceivers Using Null Carriers
    Senguttuvan, Rajarajan
    Bhattacharya, Soumendu
    Chatterjee, Abhijit
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2009, 17 (06) : 803 - 814